Capacitor Charging/Discharging

Design problem:
Some devices require rapid application of power in short bursts. Providing this energy from a source like a motor or a battery is impractical because it must have high capacity but be used infrequently. A capacitor can store electrical energy, and release it rapidly, which makes it ideal for this application.


In the figure above, the switch initially connects C1 to V1 and R1, in this state the capacitor will begin to charge. The voltage on the capacitor grows as a function of (1-e^(-kt)) similar to the following free mat plot.



When the switch is moved to the second position, the voltage across C1 will begin to bleed through R2. The voltage during discharge will resemble a exponential decay plot, like the following graph.


The rate of increase and decrease are limited by resistors R1 and R2 respectively. If we would like to slowly charge the capacitors with a low power source we can make R1 large and if we would like to discharge the capacitor quickly we can make R2 very small.

Lab Problem:

Design build and test a charge/discharge system that uses a 9V power supply, has a charging interval of about 20s with a stored energy of 2.5mJ and can discharge is 2s.

1. Determine Capacitance

The capacitance can be found by solving for the energy stored on a capacitor, which is one half the capacitance multiplied by the square of the voltage. This corresponds to a capacitance of 61.7uF (ideal) or 64.5uF (real). (the difference between the real and ideal is the concept of leakage current through the dielectric material used to insulate the capacitive elements from each other.)

2. Determine R1

The charging time is approximately 5tau, where tau is the time constant for the RC circuit. In RC circuits, tau is equal to the product of R and C. In order to solve for the resistance, one would take the capacitance found in step one and multiply it with the unknown R1 and then multiply by 5.  This expression is then equated to 20s and solved for the unknown.

3. Determine R2

As the discharge time is one tenth the charge time, the capacitor is shared in each instance, and the resistance is proportional to the time constant, one can just assume R2 = R1/10, yielding a value of 6.48kOhms.

Analysis of Circuit Measurements:

1. What could account for the difference between the supply voltage and the maximum capacitor voltage recorded?
 Every capacitor has some leak resistance, which means that the maximum voltage seen across its terminals is controlled by the voltage divider formed by the input resistance and the leak resistor.
In out experiment the max voltage was found to differ from the supply voltage by approximately 6 percent. This corresponds to a leak resistance of 872 kOhms.

A cursory examination of this result would allow the engineer to record that data point and then move on, however there is a variable which needs to be accounted for. The typical input resistance of a scope probe is 1 MOhms, and as we were recording our voltage measurements on a scope the calculated resistance may be greatly in error.

Once compensated, the leak resistance is found to be approximately 6.8 Mohms.

2. Does the capacitor fully discharge within 2 seconds?

Yes, the discharge time is approximately 2 seconds.

3. Calculate the Thevinin Voltage 'seen' by the capacitor during charging.

Trivial. In the steady state condition a capacitor has the Thevinin voltage across its input terminals, so the Vth is the measured value. If the scope resistance was not interfering, the terminal voltage would be less than 1 percent different than the source voltage.

The measured voltage was found to be 8.45 volts.

4. Calculate Vth and Rth 'seen' during discharge.

Using the cursory solution, Rth is found to be 6432 Ohms, a .7 percent variance from the ideal circuit. Using the compensated solution the resistance is found to be 6473 ohms,  a .1 percent variance.

Vth is zero in the discharging state as there is no source in the circuit.

5. Determine the time constant for your circuit by measuring how long it takes to reach  99 percent of Vth.
 Charge time:
Actual 22.1 seconds
Theoretical 20 seconds.

Time constant:
Actual 4.42 seconds
Theoretical 4 seconds


Practical questions:

 If this system was used to power a rail gun, 160MJ per discharge, and is charged at 15kVDC find:
1. Capacitance

(1.42F)

2.If the capacitance was provided by 8 capacitors arranged such that 2 are in series in four parallel branches, what should the individual capacitance ratings be?

(.711F)

Operational Amplifiers I

Design problem:

A sensor needs to be interfaced to a micro-controller. The problem is that its output voltage is too low/high for the micro-controller to get the data. In order to fix this, an operational amplifier can be employed.

Block diagram:

If the sensor delivers a Vs, range [0,1] V and the micro-controller has analog input range [0,10] V, we seek some signal conditioner which can apply a gain of approximately 10 such that Vc = 10Vs.

An operational amplifier, commonly referred to as an op amp, is an ideal candidate for this project.






Before we begin, there is an excellent document titled, "HANDBOOK OF OPERATIONAL AMPLIFIER APPLICATIONS" by Bruce Carter and Thomas R. Brown which will suffice to fill in any gaps I leave in my blog post. Additionally, some diagrams found in this post are screen capped from that document.

An ideal op amp can be summarized by the following block diagram.

There are 5 terminals of interest on an op amp, the positive and negative voltage sources, labeled Vcc and -Vcc, the input voltages V1 (inverting) and V2 (non-inverting), and the output voltage Vo. In the ideal op amp, Vo = (V2-V1)*gain, however the op amp cannot have an output voltage greater than Vcc, or less than -Vcc. As most op amps have gain values in the millions, a difference on the order of microvolts can cause the op amp to saturate and cause a loss of data. The solution to this problem is to introduce a feedback path from the output to one of the input terminals, this has the effect of minimizing the voltage difference between V1 and V2, thus allowing the signal to pass through without loss of information.

Note* in many op amp circuits Vcc and -Vcc will not be labeled, as it is assumed that the user will chose them appropriately. Also, it improves the appearance of final schematics.

A simple application of an op amp is to employ a feedback resistor between Vo and V1 like so.

 

Here Vo has been replaced with Eo, V2 is tied to ground and V1 is in the middle of a voltage divider between E1 and Eo. A property of op amps in a feedback configuration is that the voltage difference between the inverting and non-inverting terminals is virtually zero, thus we can consider this circuit to have a zero voltage at the inverting input (V1). If that is the case, then the current through R1 is just  E1/R1. As there is no voltage difference between the input terminals, no current flows through the inputs, and the rest of the current is diverted through Ro. This means that the output voltage (Eo) is equal to the negative of the current through R1 multiplied Ro. If that is the case, our expression for the output voltage  is  Eo = -E1(R0/R1) and our gain is equal to -(Ro/R1). 

Returning to our original problem, we found that we needed a gain of 10. An inverting amplifier is obviously not suitable for this application, as we do not want to multiply by a negative number. The second configuration of an op amp will solve this problem.

This configuration is called a non-inverting amplifier, and the gain is defined as Eo = (1+R0/R1)E1. A positive gain is consistent with our desired gain of 10, thus all that remains is to choose Ro and R1 such that the ratio Ro/R1 = 9 and our design is complete.

Laboratory Constraints:

Using the results from our theoretical analysis, we are now to design and implement a non-inverting amplifier and demonstrate its operation. 

Changes: 

The sensor should provide no more than 1mA of current.

Each power supply should provide less than 30 mW of current.

We are to simulate the sensor in question using a voltage divider like so:

I have chosen to simulate the sensor as a 5V supply across a voltage divider with a static 5 kohms and a variable resistor of magnitude [0,1200] ohms. This configuration assures that the sensor will never supply more than 1 mA. The result of incrementing the resistance is the following plot of output voltage versus resistance. 

The output voltage is not strictly linear, but is close enough to demonstrate the concept. 

After the voltage divider stage a non-inverting amplifier is constructed as follows.

 The parameters dialog in the top right of the screen capture is necessary for the DC sweep which generates the output graphs. R3 and R4 were chosen such that their ratio is equal to 9. This satisfies our requirement that the gain of our amplifier is approximately equal to 10. A plot of the output voltage as a function of R1 can be seen below.

It is evident that the output voltage is nearly identical to the input voltage with a gain of 10. Additionally, with the op amp in this configuration, the sensor is not delivering any current to the op amp, and thereby its voltage divider is  not loaded. Our design is sound and we are free to move to the experimental phase.

Here is a photo of the circuit constructed on a breadboard. It is not quite as pretty as the schematic, but at least it has colors!

Design Question #1:

Determine the minimum static resistance in the voltage divider in order to prevent the sensor from providing greater than 1mA. 

Constraint:

5V/R = 1mA 

Solution:

R = 5 kohms

Design Question #2:

What should the maximum variable resistance of the voltage divider be in order to generate an output voltage to the op amp of 1V?

By using the voltage divider rule, the R value is found to be 1250 ohms.

Design question #3:

Determine the Thevenin Equivalent for the voltage divider.

By a judicious adjustment of the laboratory schematic, the Thevenin voltage and resistance are trivial. By connecting the output of the  voltage divider to the non-inverting terminal instead of the inverting terminal the op amp will source no current from the voltage divider, thus allowing the op amp to operate in a more linear fashion.

Data:








As is evident in the table, the calculated gain is less than 1% different than the desired gain, and is within acceptable tolerances.